[antlr-interest] Lexer problem

[Tom Verbeure]

Hi All,
I'm stuck with a VHDL lexer. The ' character determination can be
highly context sensitive. Consider some examples:

c <= '(';         -- '(' should be lexed as a single token, 
representing a
character literal
D <= vector'(A);  -- ' should be lexed as a QUOTE token
D <= string'('''&'('&')'); -- should have the following token 
sequence:

"<="
string : IDENTIFER
'      : QUOTE
'''    : CHAR_LITERAL, representing a '
&      : AMPERSAND
'('    : CHAR_LITERAL, representing (

I think I have found a rule that will satisfy all conditions:

QUOTE: '\'' (
    {LA(2)=='(' && LA(3)=='\'' && LA(5)=='\''}? {$setType(QUOTE);}
    | {LA(3)=='\''}? . "'"                      {$setType(CHAR_LIT};}
    |                                           {$setType(QUOTE);}
    ;

However, when I look at the generated code, it will always test for 
CHAR_LIT first, before looking at the first QUOTE. 

I've tried a number of variations, but they are not leading anywhere. 
Any suggestions?

Thanks,
Tom






 
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