[antlr-interest] verilog list_of_ports question

Derek Pappas depappas at yahoo.com
Tue Feb 15 01:21:37 PST 2005


This is one way to handle the verilog list_of_ports
which uses port. Port is used in the module list and
the instance list. Note that the instance list can be
a formal to actual mapping where the formal is an
expression (Id or  other expression) or the instance
list can be an ordered list. My email client stomped
on the formatting. Basically the interseting nodes aer
extracted into a list and then the tree construction 
#() syntax is used to create a new root node.

//------------------------------------------------------------
// list_of_ports needs to handle 3 cases
// module foo;        // no parens and no list
// module foo();      // parens and no list 
// module foo(a,b,c); // parens and list
//------------------------------------------------------------

list_of_ports 
    :   (LPAREN RPAREN) => LPAREN! RPAREN! SEMI!      
              { #list_of_ports =
#(#[PORT_LIST,"PORT_LIST"], #list_of_ports); } 
    |   (LPAREN port) => LPAREN! port ( COMMA! port )*
RPAREN! SEMI! { #list_of_ports =
#(#[PORT_LIST,"PORT_LIST"], #list_of_ports); } 
    |   SEMI!                                         
              { #list_of_ports =
#(#[PORT_LIST,"PORT_LIST"], #list_of_ports); }   
        ;

port :
	(port_expression)? 

|
        d:DOT^ { #d->setType(
PORT_FORMAL_TO_ACTUAL_MAP );
#d->setText("PORT_FORMAL_TO_ACTUAL_MAP");}          
        name_of_port LPAREN! (port_expression)?
RPAREN!
	;

port_expression 
    :   port_reference
	|   LBRACE port_reference ( COMMA! port_reference )*
RBRACE // in this case the 1st port_ref is the port
and 2nd port_ref 
        // is an internally declared wire. This is
valid verilog. The port is tied to the internal wire
    ;

port_reference : // fix make the root PORT_REF?
        ( name_of_variable LBRACK expression COLON )
=>
        n0:name_of_variable { #n0->setType(PORT_ID);  
                      }
        l0:LBRACK           { #l0->setType(RANGE2 );
#l0->setText("RANGE2" );}
        expression COLON! expression RBRACK!
    |
        ( name_of_variable LBRACK ) =>
        n1:name_of_variable { #n1->setType(PORT_ID);  
                       } 
        l1:LBRACK           { #l1->setType(RANGE1 
);#l1->setText("RANGE1" ); }
        expression RBRACK!
    |
        n2:name_of_variable
        { #n2->setType(PORT_ID); }
    ;


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